Over the industrial range of operating temperatures and over 4.5 orders of magnitude of input voltages from 100 µV to 6 V, the Figure 4 circuit shows a worst-case error of better than -5.0% / + 1.0%. V0 ranges from 2.5 mV to 3 V

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Other Materials from the Main Document

• Article «A temperature-compensated, calibration-free anti-log amplifier»
• Figure 1. The typical anti-log circuit has uncertainties related to the reverse current, I_S, and is sensitive to temperature
• Figure 2. This circuit addresses variations in both temperature and I_S. Key to its successful operation is that Q_1A and Q_1B constitute a matched pair, taken from adjacent locations on the same silicon wafer. Operating with the same
• Figure 3. A comparison of a highly non-linear NTC and a nearly linear PTC
• Figure 4. The simulated circuit with R_2A, R_2B, and R₃ chosen with the help of Excel's Solver. A specific matched pair of transistors has been selected, along with values for resistors R₁ and R_REF, and a voltage
• Figure 5. Over the industrial range of operating temperatures and over 4.5 orders of magnitude of input voltages from 100 µV to 6 V, the Figure 4 circuit shows a worst-case error of better than -5.0% / + 1.0%. V0 ranges from 2.5 mV to 3 V
• Figure 6. Split R₁ of Figure 4 into R_1A and R_1B; also add U₄, R_SENSE, and a 2N5089 transistor to produce a current source output