For decades, I’ve had a fascination with voltage-to-frequency converters and the 555 analog timer chip, and therefore a double obsession with VFCs based on the 555. In fact, my first Design Ideas (DI) submission (in 1974) was for a 555 VFC. It was not only published but also selected as the best DI of the year. That was it, I was thenceforth hooked forever.
The simple 555 VFC design to be presented here, so far as I know and as unlikely as it sounds for so *ahem* “mature” a part as the 555, is novel. It runs with good linearity and accuracy at 1 MHz, with even faster operation possible. That’s 100x faster than that 1974 555 frequency converter.
I hope you’ll find its details interesting. Here’s how it works. The story begins with Figure 1.
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| Figure 1. | Starred components are precision, including the +5 V supply, but something’s missing. |
There’s nothing novel about the input current source comprising A1, Q1, and surrounding parts. It supplies 0 to 1 mA to the U1 current-to-frequency converter in response to its input voltage, as scaled and offset by R1 and R2. The values shown set a 0 to +5 V input span. R1 = 1.8M and R2 = 200k would make it –5 V to +5 V.
A capacitor added in parallel with R2 will provide extra noise rejection. But the inherent noise immunity of the VFC analog-to-digital conversion is good, so you probably won’t need it.
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| Figure 2. | Nonlinear red curve versus ideal black shows ~20% linearity error from LMC555 internal delays. |
Moving further into the circuit is when things do start to get weird, because the usual two resistors associated with 555 oscillators are missing. Also missing is the usual astable 555 1/3V+ peak-to-peak voltage swing. This topology generates a 2/3V+ Vpp linear sawtooth waveform that resets, not to V+/3, but to zero. Unfortunately, while the sawtooth is nicely linear, due to U1’s internal switching delays TD, the frequency versus Q1 current Iq1 relationship is not very linear. Figure 2 shows how bad it is.
Frequency of oscillation
Luckily, as derived in another recent DI: “Improve 555 frequency linearity“ (Ref. 1).
…it’s an easy fix. It consists of a single resistor, R4, connected between the DSC (discharge) and THR (threshold) pins. R4 is used to linearize the current-versus-frequency function by biasing the Thr pin upward by ICR4. That cuts short the duration of the positive-going timing ramp and thereby the sawtooth period by the same amount that the delays lengthen it:
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| Figure 3. | R4C2 = TD = 212 ns = nonlinearity compensation for 555 internal delays. |
Thus, if R4 is chosen so R4C2 = TD as shown in Figure 3, nonlinearity compensation will be (at least theoretically) complete over the full range of control current. The frequency of oscillator (FO) for this circuit:
Now FO will linearly track Iq1 and therefore VIN as shown in Figure 4.
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| Figure 4. | Nonlinearity disappears if R4 = TD/C2 = 212 нс/300 пФ = 706 Ом. |
Reference
- Woodward, Stephen. "Improve 555 frequency linearity."