Circuits & Schematics: CLOCK - 10

Search for: "CLOCK"
Search results: 263 Output: 91-100
  1. .. resolution. Alternatively, you can take those three bits from the top of the original PWM duty-cycle value, multiplying its clock rate by eight. You still get the 8:1 ripple reduction, but the increased clock rate pushes PWM noise further ...
    Dec 12, 2017
  1. Louis Vlemincq
    .. a pseudo sine wave. In operation, the sine-wave output appears across inductor L in a series LC circuit. An external clock source produces gate drive for transistor Q at a frequency that's lower than the LC circuit's natural ...
    Oct 31, 2017
  2. Alperen Akküncü
    .. rise-time, and faster PWM frequency translates to lower resolution when achieved by reducing the counter size at a given clock frequency. I am going to talk about an interesting Design Idea that focuses on lowering the ripple of PWM DACs ...
    Oct 20, 2017
  3. Ajoy Raman
    .. inverter. This negative-going edge is used as an interrupt to the processor. The Arduino Uno, operating with a 16-MHz clock, is programmed to use Timer0 to set up the PWM output OCRA at 244 Hz with the pulse-width set to 224/255 ...
    Oct 12, 2017
  4. Marián Štofka
    .. voltage and switches this increased voltage to the output (Figure 1). The circuit repeats these two phases of operation at clock frequency F. Figure 1. This charge-pump circuit raises the input voltage to a 1.33 multiple. You can use it as ...
    Oct 5, 2017
  5. Ron Mancini
    .. periodic waveforms to square waves is an integral part of extracting a clock signal from data, creating waveform generators, and making timing-pulse generators. Any square-wave-conversion ...
    Sep 26, 2017
  6. John Ambrose
    .. Systems Inc, provides a 1000-to-1 divider in an eight-pin package. IC 3 , Mixed Signal Integration’s MSHN5 1000-to-1 clock-to-corner switched-capacitor highpass/notch filter, comes in an eight-pin package. Figure 1. This audio ...
    Sep 14, 2017
  7. Circuits Measurement Texas Instruments 74HC4040 CD4017B CD4081B CD4093B CD4518B
    .. is performed by a CD40103 8-bit synchronous countdown counter, which generates the first output pulse when the first clock arrives from NAND Gate A. This triggers the monostable IC6 ( CD4538 ) that loads the down counter with the ...
    Sep 12, 2017
  8. T A Babu
    .. At this time, the Q0 output from pin 3 sets the LED brightness to 25% as determined by R14 (Figure 2). Each push feeds a clock pulse to IC2.14, which increments the count. The second push makes Q1 go high, with R15 now setting the second ...
    Aug 10, 2017
  9. .. desired to check the state of the batteries more often. This code segment can be used to test the circuit: Init(GPIO,Clock,etc..); void Test_BattMon(void) { // Using pin PA0 to drive and to sample the Battery monitor while(l) { ...
    Jul 12, 2017

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