A linearized output is a useful elaboration of a capacitive sensor design. But what if the circuit is located a significant distance from the control electronics?
Recently, Design Ideas included a circuit (Ref. 1) that comprised a simple analog interface to basic capacitive position sensors. Figure 1 shows its minimal six parts topology with complementary outputs: OUT and –OUT.
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| Figure 1. | U1a and U1b cross-coupled Schmidt trigger timers form a ~1 MHz RC multivibrator. The TSEN pulse width is inversely proportional to sensor displacement. |
Doubling the parts count to 12 transmogrifies Figure 1 into Figure 2 and provides a linear voltage mode output, Then, with the exemplar 38 mm-diameter sensor plate capacitor connected, separation d between plates reads out as d = (VOUT – 1) = 0 to 4 millimeters as VOUT goes from 1 to 5 V. VOUT ripple is just half a millivolt pk-pk. The linear voltage output modification is described in this Design Idea (Ref. 2).
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| Figure 2. | Averaging integrator A1 implicitly computes the output voltage needed to linearly balance the charge transferred onto C1 during TREF through discharge during TSEN. |
So, let’s take it as granted that providing a linearized output was a useful elaboration of the original design. But suppose the capacitive sensor is located a significant distance from the control electronics. Voltage mode analog outputs are notoriously vulnerable to noise pickup and disturbances like ground loop voltage differentials. What to do then? Figure 3 shows a simple and plausible remedy. It’s a classic, if I do say so myself. A noise- and cable length- tolerant, linear 4 to 20 mA, current mode output.
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| Figure 3. | Dangling the TLV431 shunt voltage reference Z1 from the 15 volt supply is a shortcut toward implementing a noise- and cable length- tolerant current mode output. |
Here’s how it works. Figure 3’s A1 integrator generates a 1 to 5 volt linear output, much like Figure 2’s A1 does. The difference is this 1 to 5 V is inverted, referenced to +15 V, and developed across 249 ohm current sense resistor R5. It’s therefore an accurate readout of PFET Q1’s 4 to 20 mA source current. Shunt reference Z1 provides both the 1.00 V integrator reference and a 5 V step-down supply for U1 and U2. DC blocking C4 and R9 trickle protect the chips from being instantly fried in case the sensor capacitor plate shorts to ground.
Some random remarks: U1’s unused inputs should be tied to +15 V. C1, 2, 3, and 4 should be rated for the full supply voltage, which itself isn’t critical but shouldn’t exceed 20 V. Otherwise Q1’s gate will be at risk for over-voltage if the load becomes disconnected. If the supply equals 15 V as shown, voltage compliance and consequent ground noise resistance is >9 V. IOUT ripple is ~0.01% pk-pk. Figure 4 shows the net nicely linear response.
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| Figure 4. | In this graph, black = sensor readout d in mm, and red = the nicely constant 4 microamps per micrometer resolution. |
References
- Woodward, Stephen. "~0.1% resolution capacitive position sensor."
- Woodward, Stephen. "Capacitive position sensor with linearized output."